   1              		.syntax unified
   2              		.cpu cortex-m3
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 4
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.thumb
  14              		.syntax unified
  15              		.file	"uart1_irq.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.global	__aeabi_i2d
  20              		.global	__aeabi_dmul
  21              		.global	__aeabi_d2iz
  22              		.global	__aeabi_i2f
  23              		.global	__aeabi_fdiv
  24              		.global	__aeabi_fadd
  25              		.global	__aeabi_fmul
  26              		.global	__aeabi_f2d
  27              		.global	__aeabi_ddiv
  28              		.section	.text.uart1_SetBaudrate,"ax",%progbits
  29              		.align	1
  30              		.global	uart1_SetBaudrate
  31              		.thumb
  32              		.thumb_func
  34              	uart1_SetBaudrate:
  35              	.LFB3:
  36              		.file 1 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c"
   1:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** /*
   2:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	ESTA BIBLIOTECA NÃO TRATA OS ERROS DE RECEPÇÃO PE, OE, FE E BI NAS INTERRUPÇÕES
   3:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	Logo as interrupções rx line (U0IER_ELSI) e as interrupções responsável pelo modem estão desativad
   4:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
   5:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	1 - SE NÃO USARMOS CONRTROLE DE FLUXO devemos levar em consideração o estouro da buffer
   6:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		de recepção para onde o ARM está trasmitindo
   7:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		se transmitirmos muitos dados em um baudrate elevado, o buffer do destino pode estourar e
   8:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		pode aperece que o problema seja nas nossas bibliotecas. então
   9:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		aumente o buffer rx do destino, ou aumente a prioridade de recepção
  10:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		ou diminuia o baudrate em uma taxa mais adequada
  11:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  12:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	A interrupção de transmissão é gerada a cada 16 bytes transmitidos, ou seja, quando a FIFO TX esti
  13:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	A interrupção de recepção é gerada, na pior das hipóteses, a cada byte recebido; isto porque podem
  14:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	o nível da FIFO RX (trigger) para que a interrupção seja gerada.
  15:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  16:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	Como a UART não é tão rápida assim e não há tanto fluxo de dados pela UART, as interrupções não sã
  17:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	subsequentemente dando tempo de sobra para outras funções da CPU.
  18:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** */
  19:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  20:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #include "uart1_irq.h"
  21:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #include "vic.h"	
  22:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #if defined(cortexm3)
  23:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #include "arm.h"
  24:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #endif
  25:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  26:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static volatile u8 u1_tx_running;						// Indicador se existe dados sendo transmitidos na UART
  27:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static volatile u16 u1_overflow_rx;						// Contador de estouro do buffer de recepção
  28:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
  29:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // BUFFERS DE RECEPÇÃO E TRANSMISSÃO
  30:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static volatile buffer_t u1_buf_rx; 					// Cria uma estrutura do buffer de recepção
  31:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static volatile buffer_t u1_buf_tx;						// Cria uma estrutura do buffer de transmissão
  32:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
  33:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #if (USE_MALLOC == pdON)
  34:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	static u8 *u1_data_rx;								// Ponteiro para alocação de memória para o buffer de recepção
  35:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	static u8 *u1_data_tx;								// Ponteiro para alocação de memória para o buffer de transmissão
  36:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #else
  37:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	static u8 u1_data_rx[UART1_RX_BUFFER_SIZE];			// Alocação de memória automática para o buffer de r
  38:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	static u8 u1_data_tx[UART1_TX_BUFFER_SIZE];			// Alocação de memória automática para o buffer de t
  39:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #endif
  40:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		
  41:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_ISR (void);
  42:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  43:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
  44:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // UART CONFIGURAÇÔES
  45:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
  46:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
  47:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  48:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
  49:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Incializa e configura o modo de trabalho da UART
  50:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	baudrate: 
  51:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //					1200, 2400, ... , 57600, 115200 ...
  52:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		retorna pdPASS se iniciliazou sem problemas ou retorna código de erro
  53:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
  54:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_Init(u32 baudrate) {
  55:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	PCONP |= PCUART1;											// Ligar a uart no controle de potencia. Tem que ser antes da config
  56:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
  57:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if defined(arm7tdmi)
  58:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1_PINSEL = (U1_PINSEL & ~U1_PINMASK) | U1_PINS;			// Configura os pinos do uC para a função UAR
  59:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#if defined(LPC2468)
  60:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   		U1_PINSEL1 = (U1_PINSEL1 & ~U1_PINMASK1) | U1_PINS1;	// Configura os pinos do uC para a função 
  61:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#endif
  62:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif // arm7tdmi
  63:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  64:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#if defined(cortexm3)
  65:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	uart1_ConfigPort();
  66:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
  67:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  68:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if (UART1_USE_HANDSHAKING == pdON)
  69:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	// Por padrão esses pinos já são GPIO
  70:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1_CTS_DIR &= ~U1_CTS; 				// Pino CTS como entrada
  71:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1_RTS_DIR |= U1_RTS; 				// Pino RTS como saída
  72:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	uart1_RTSon(); 						// Sinaliza que posso receber dados
  73:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
  74:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  75:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1IER = 0;   	                      						// Desabilita todas as fonte de interrupções da uart
  76:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1IIR;                                						// Limpa os identificadores de pendencia interrupçõe
  77:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = (U1FCR_TX_FIFO_RESET | U1FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
  78:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
  79:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	uart1_SetBaudrate(baudrate);
  80:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
  81:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = UART1_FIFOMODE;										// Configura o modo de trabalho da FIFO
  82:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  83:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1RBR;                                						// Limpa o registrador de recepçao de dados
  84:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LSR;                                						// Limpa o registrador de estado de linha
  85:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1FCR = U1FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
  86:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = U1FCR_TX_FIFO_RESET;          						// Limpa a FIFO de transmissão
  87:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  88:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if defined(arm7tdmi)
  89:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	if (!irq_Install(VIC_UART1, uart1_ISR, UART1_PRIO_LEVEL))
  90:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		return errIRQ_INSTALL;
  91:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
  92:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  93:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if defined (cortexm3)
  94:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nvic_enableIRQ(VIC_UART1);
  95:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nvic_setPriority(VIC_UART1, UART1_PRIO_LEVEL);
  96:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
  97:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
  98:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	// INICIALIZO OS BUFFERS DE RECEPÇÃO E TRANSMISSÃO
  99:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if (USE_MALLOC == pdON)
 100:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_data_rx = malloc(UART1_RX_BUFFER_SIZE*sizeof(u8));
 101:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_data_tx = malloc(UART1_TX_BUFFER_SIZE*sizeof(u8));
 102:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 103:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 104:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	buffer_Init(&u1_buf_rx, u1_data_rx, UART1_RX_BUFFER_SIZE);
 105:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	buffer_Init(&u1_buf_tx, u1_data_tx, UART1_TX_BUFFER_SIZE);
 106:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		
 107:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_overflow_rx = 0; 										// Limpa overflow do buffer de recepção
 108:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_tx_running = pdFALSE;
 109:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		
 110:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER |= U1IER_ERBFI;										// Habilita interrupção de dados prontos na recepção e CTI (SIMULAD
 111:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER &= ~U1IER_ETBEI;               						// Desabilita a interrupção de buffer vazio de transmis
 112:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
 113:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return pdPASS;
 114:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 115:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 116:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #if (defined(cortexm3) && (UART1_USE_BAUDRATE_TUNE == pdON) )
 117:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //a rotina tenta encontrar a melhor combinação
 118:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //indiferente da frequência e do baud
 119:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	detremina o valor dos registradores "DLM/DLL"
 120:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	aqui forçamos o baud a ficar mais veloz do que o valor
 121:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	desejado para que o ajuste através do FDR seja mais preciso
 122:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static int uart_dlm(int baud) {
 123:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return (int)(((PCLK / 16) / baud) * 0.8);
 124:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 125:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 126:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //brief
 127:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	o registrador FDR permite apenas "reduzir" o baud rate, por isso
 128:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	ao calcular DLM devemos usar um baud mais veloz
 129:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //params
 130:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	<baud> desired baud rate
 131:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //obs
 132:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	1<=M<=15
 133:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	0<=D<=14
 134:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	D<M
 135:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //	fraction = BAUD*(1+D/M)
 136:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #include <stdlib.h>
 137:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** static int uart_fdr(int baud) {
 138:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	int d, m, b, e, r;
 139:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	float f;
 140:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	r = 1<<4; //apenas o MULVAL por default
 141:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	e = baud;
 142:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	for(m=1;m<=15;m++) {
 143:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		for (d=0;d<m;d++) {
 144:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			f = 1.0 + (float)d/(float)m;
 145:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			//calcula o baud truncado
 146:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			b = uart_dlm(baud);
 147:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			//agora o valor final corrigido
 148:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			b = (int)(PCLK/(b*f*16.0));
 149:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			//erro ficou menor?
 150:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			if (abs(baud-b)<e) {
 151:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 				e = abs(baud-b);
 152:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 				r = (m<<4) + d;
 153:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			}
 154:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		}
 155:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	}
 156:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return r;
 157:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 158:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 159:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_SetBaudrate(u32 baudrate) {
  37              		.loc 1 159 0
  38              		.cfi_startproc
  39              		@ args = 0, pretend = 0, frame = 8
  40              		@ frame_needed = 0, uses_anonymous_args = 0
  41              	.LVL0:
  42 0000 2DE9F74F 		push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
  43              	.LCFI0:
  44              		.cfi_def_cfa_offset 48
  45              		.cfi_offset 4, -36
  46              		.cfi_offset 5, -32
  47              		.cfi_offset 6, -28
  48              		.cfi_offset 7, -24
  49              		.cfi_offset 8, -20
  50              		.cfi_offset 9, -16
  51              		.cfi_offset 10, -12
  52              		.cfi_offset 11, -8
  53              		.cfi_offset 14, -4
  54              		.loc 1 159 0
  55 0004 8046     		mov	r8, r0
 160:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LCR = U1LCR_DLAB_ENABLE;             						// Seleciona os latches de devisões para ajusta do 
  56              		.loc 1 160 0
  57 0006 344E     		ldr	r6, .L8+16
  58              	.LBB8:
  59              	.LBB9:
 123:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
  60              		.loc 1 123 0
  61 0008 3448     		ldr	r0, .L8+20
  62              	.LVL1:
  63              	.LBE9:
  64              	.LBE8:
  65              		.loc 1 160 0
  66 000a 8023     		movs	r3, #128
  67 000c 3360     		str	r3, [r6]
  68              	.LVL2:
  69              	.LBB12:
  70              	.LBB10:
 123:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
  71              		.loc 1 123 0
  72 000e 90FBF8F0 		sdiv	r0, r0, r8
  73 0012 FFF7FEFF 		bl	__aeabi_i2d
  74              	.LVL3:
  75 0016 2CA3     		adr	r3, .L8
  76 0018 D3E90023 		ldrd	r2, [r3]
  77 001c FFF7FEFF 		bl	__aeabi_dmul
  78              	.LVL4:
  79 0020 FFF7FEFF 		bl	__aeabi_d2iz
  80              	.LVL5:
  81              	.LBE10:
  82              	.LBE12:
  83              	.LBB13:
  84              	.LBB14:
 141:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	for(m=1;m<=15;m++) {
  85              		.loc 1 141 0
  86 0024 C246     		mov	r10, r8
  87              	.LBE14:
  88              	.LBE13:
  89              	.LBB16:
  90              	.LBB11:
 123:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
  91              		.loc 1 123 0
  92 0026 0746     		mov	r7, r0
  93              	.LVL6:
  94              	.LBE11:
  95              	.LBE16:
 161:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	u32 f_div = uart_dlm(baudrate);
 162:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 163:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1DLL = f_div%256;        									// Ajusta o baudrate byte baixo
  96              		.loc 1 163 0
  97 0028 2D4B     		ldr	r3, .L8+24
  98 002a C2B2     		uxtb	r2, r0
  99 002c 1A60     		str	r2, [r3]
 164:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1DLM = f_div/256;    										// Ajusta o baudrate byte alto
 100              		.loc 1 164 0
 101 002e 020A     		lsrs	r2, r0, #8
 102 0030 5A60     		str	r2, [r3, #4]
 103              	.LVL7:
 104              	.LBB17:
 105              	.LBB15:
 140:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	e = baud;
 106              		.loc 1 140 0
 107 0032 4FF01009 		mov	r9, #16
 142:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		for (d=0;d<m;d++) {
 108              		.loc 1 142 0
 109 0036 0124     		movs	r4, #1
 110              	.LVL8:
 111              	.L2:
 152:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			}
 112              		.loc 1 152 0
 113 0038 4FEA041B 		lsl	fp, r4, #4
 114 003c 0025     		movs	r5, #0
 115              	.LVL9:
 116              	.L4:
 150:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 				e = abs(baud-b);
 117              		.loc 1 150 0
 118 003e 2846     		mov	r0, r5
 119 0040 FFF7FEFF 		bl	__aeabi_i2f
 120              	.LVL10:
 121 0044 0190     		str	r0, [sp, #4]
 122 0046 2046     		mov	r0, r4
 123 0048 FFF7FEFF 		bl	__aeabi_i2f
 124              	.LVL11:
 125 004c 019B     		ldr	r3, [sp, #4]
 126 004e 0146     		mov	r1, r0
 127 0050 1846     		mov	r0, r3
 128 0052 FFF7FEFF 		bl	__aeabi_fdiv
 129              	.LVL12:
 130 0056 4FF07E51 		mov	r1, #1065353216
 131 005a FFF7FEFF 		bl	__aeabi_fadd
 132              	.LVL13:
 133 005e 0190     		str	r0, [sp, #4]
 134 0060 3846     		mov	r0, r7
 135 0062 FFF7FEFF 		bl	__aeabi_i2f
 136              	.LVL14:
 137 0066 019B     		ldr	r3, [sp, #4]
 138 0068 0146     		mov	r1, r0
 139 006a 1846     		mov	r0, r3
 140 006c FFF7FEFF 		bl	__aeabi_fmul
 141              	.LVL15:
 142 0070 FFF7FEFF 		bl	__aeabi_f2d
 143              	.LVL16:
 144 0074 0022     		movs	r2, #0
 145 0076 1B4B     		ldr	r3, .L8+28
 146 0078 FFF7FEFF 		bl	__aeabi_dmul
 147              	.LVL17:
 148 007c 0246     		mov	r2, r0
 149 007e 0B46     		mov	r3, r1
 150 0080 13A1     		adr	r1, .L8+8
 151 0082 D1E90001 		ldrd	r0, [r1]
 152 0086 FFF7FEFF 		bl	__aeabi_ddiv
 153              	.LVL18:
 154 008a FFF7FEFF 		bl	__aeabi_d2iz
 155              	.LVL19:
 156 008e C0EB0800 		rsb	r0, r0, r8
 157 0092 0028     		cmp	r0, #0
 158 0094 B8BF     		it	lt
 159 0096 4042     		rsblt	r0, r0, #0
 160 0098 5045     		cmp	r0, r10
 161              	.LVL20:
 162 009a B8BF     		it	lt
 163 009c 05EB0B09 		addlt	r9, r5, fp
 164              	.LVL21:
 143:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			f = 1.0 + (float)d/(float)m;
 165              		.loc 1 143 0
 166 00a0 05F10105 		add	r5, r5, #1
 167              	.LVL22:
 150:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 				e = abs(baud-b);
 168              		.loc 1 150 0
 169 00a4 B8BF     		it	lt
 170 00a6 8246     		movlt	r10, r0
 171              	.LVL23:
 143:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			f = 1.0 + (float)d/(float)m;
 172              		.loc 1 143 0
 173 00a8 AC42     		cmp	r4, r5
 174 00aa C8D1     		bne	.L4
 142:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		for (d=0;d<m;d++) {
 175              		.loc 1 142 0
 176 00ac 0134     		adds	r4, r4, #1
 177              	.LVL24:
 178 00ae 102C     		cmp	r4, #16
 179 00b0 C2D1     		bne	.L2
 180              	.LVL25:
 181              	.LBE15:
 182              	.LBE17:
 165:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FDR = uart_fdr(baudrate);
 183              		.loc 1 165 0
 184 00b2 0D4B     		ldr	r3, .L8+32
 185 00b4 C3F80090 		str	r9, [r3]
 166:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1LCR = (UART1_MODE & ~U1LCR_DLAB_ENABLE);					// Configura o modo de trabalho da uart e desativa 
 186              		.loc 1 166 0
 187 00b8 0323     		movs	r3, #3
 188 00ba 3360     		str	r3, [r6]
 167:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 189              		.loc 1 167 0
 190 00bc 03B0     		add	sp, sp, #12
 191              	.LCFI1:
 192              		.cfi_def_cfa_offset 36
 193              		@ sp needed
 194 00be BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 195              	.LVL26:
 196              	.L9:
 197 00c2 00BFAFF3 		.align	3
 197      0080
 198              	.L8:
 199 00c8 9A999999 		.word	-1717986918
 200 00cc 9999E93F 		.word	1072273817
 201 00d0 00000000 		.word	0
 202 00d4 84D77741 		.word	1098372996
 203 00d8 0C000140 		.word	1073807372
 204 00dc 84D71700 		.word	1562500
 205 00e0 00000140 		.word	1073807360
 206 00e4 00003040 		.word	1076887552
 207 00e8 28000140 		.word	1073807400
 208              		.cfi_endproc
 209              	.LFE3:
 211              		.section	.text.uart1_Init,"ax",%progbits
 212              		.align	1
 213              		.global	uart1_Init
 214              		.thumb
 215              		.thumb_func
 217              	uart1_Init:
 218              	.LFB0:
  54:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	PCONP |= PCUART1;											// Ligar a uart no controle de potencia. Tem que ser antes da config
 219              		.loc 1 54 0
 220              		.cfi_startproc
 221              		@ args = 0, pretend = 0, frame = 0
 222              		@ frame_needed = 0, uses_anonymous_args = 0
 223              	.LVL27:
  55:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 224              		.loc 1 55 0
 225 0000 234A     		ldr	r2, .L11
  54:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	PCONP |= PCUART1;											// Ligar a uart no controle de potencia. Tem que ser antes da config
 226              		.loc 1 54 0
 227 0002 2DE9F843 		push	{r3, r4, r5, r6, r7, r8, r9, lr}
 228              	.LCFI2:
 229              		.cfi_def_cfa_offset 32
 230              		.cfi_offset 3, -32
 231              		.cfi_offset 4, -28
 232              		.cfi_offset 5, -24
 233              		.cfi_offset 6, -20
 234              		.cfi_offset 7, -16
 235              		.cfi_offset 8, -12
 236              		.cfi_offset 9, -8
 237              		.cfi_offset 14, -4
  55:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 238              		.loc 1 55 0
 239 0006 1368     		ldr	r3, [r2]
  75:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 240              		.loc 1 75 0
 241 0008 224C     		ldr	r4, .L11+4
  55:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 242              		.loc 1 55 0
 243 000a 43F01003 		orr	r3, r3, #16
 244 000e 1360     		str	r3, [r2]
  65:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 245              		.loc 1 65 0
 246 0010 214A     		ldr	r2, .L11+8
  76:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = (U1FCR_TX_FIFO_RESET | U1FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
 247              		.loc 1 76 0
 248 0012 224D     		ldr	r5, .L11+12
  65:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 249              		.loc 1 65 0
 250 0014 1368     		ldr	r3, [r2]
  75:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 251              		.loc 1 75 0
 252 0016 0026     		movs	r6, #0
  65:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 253              		.loc 1 65 0
 254 0018 43F08043 		orr	r3, r3, #1073741824
 255 001c 1360     		str	r3, [r2]
 256 001e 5368     		ldr	r3, [r2, #4]
  77:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 257              		.loc 1 77 0
 258 0020 0627     		movs	r7, #6
  65:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 259              		.loc 1 65 0
 260 0022 43F00103 		orr	r3, r3, #1
 261 0026 5360     		str	r3, [r2, #4]
  75:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 262              		.loc 1 75 0
 263 0028 2660     		str	r6, [r4]
  76:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = (U1FCR_TX_FIFO_RESET | U1FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
 264              		.loc 1 76 0
 265 002a 2B68     		ldr	r3, [r5]
  77:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 266              		.loc 1 77 0
 267 002c 2F60     		str	r7, [r5]
  79:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 268              		.loc 1 79 0
 269 002e FFF7FEFF 		bl	uart1_SetBaudrate
 270              	.LVL28:
  81:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 271              		.loc 1 81 0
 272 0032 4FF00108 		mov	r8, #1
  83:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LSR;                                						// Limpa o registrador de estado de linha
 273              		.loc 1 83 0
 274 0036 1A4B     		ldr	r3, .L11+16
  81:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 275              		.loc 1 81 0
 276 0038 C5F80080 		str	r8, [r5]
  83:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LSR;                                						// Limpa o registrador de estado de linha
 277              		.loc 1 83 0
 278 003c 1B68     		ldr	r3, [r3]
  84:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1FCR = U1FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
 279              		.loc 1 84 0
 280 003e 194B     		ldr	r3, .L11+20
  85:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = U1FCR_TX_FIFO_RESET;          						// Limpa a FIFO de transmissão
 281              		.loc 1 85 0
 282 0040 4FF00209 		mov	r9, #2
  84:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1FCR = U1FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
 283              		.loc 1 84 0
 284 0044 1B68     		ldr	r3, [r3]
  86:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 285              		.loc 1 86 0
 286 0046 0423     		movs	r3, #4
  85:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = U1FCR_TX_FIFO_RESET;          						// Limpa a FIFO de transmissão
 287              		.loc 1 85 0
 288 0048 C5F80090 		str	r9, [r5]
  94:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nvic_setPriority(VIC_UART1, UART1_PRIO_LEVEL);
 289              		.loc 1 94 0
 290 004c 3846     		mov	r0, r7
  86:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 291              		.loc 1 86 0
 292 004e 2B60     		str	r3, [r5]
  94:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nvic_setPriority(VIC_UART1, UART1_PRIO_LEVEL);
 293              		.loc 1 94 0
 294 0050 FFF7FEFF 		bl	nvic_enableIRQ
 295              	.LVL29:
  95:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 296              		.loc 1 95 0
 297 0054 4946     		mov	r1, r9
 298 0056 3846     		mov	r0, r7
 299 0058 FFF7FEFF 		bl	nvic_setPriority
 300              	.LVL30:
 104:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	buffer_Init(&u1_buf_tx, u1_data_tx, UART1_TX_BUFFER_SIZE);
 301              		.loc 1 104 0
 302 005c 9622     		movs	r2, #150
 303 005e 1249     		ldr	r1, .L11+24
 304 0060 1248     		ldr	r0, .L11+28
 305 0062 FFF7FEFF 		bl	buffer_Init
 306              	.LVL31:
 105:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		
 307              		.loc 1 105 0
 308 0066 9622     		movs	r2, #150
 309 0068 1149     		ldr	r1, .L11+32
 310 006a 1248     		ldr	r0, .L11+36
 311 006c FFF7FEFF 		bl	buffer_Init
 312              	.LVL32:
 107:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_tx_running = pdFALSE;
 313              		.loc 1 107 0
 314 0070 114B     		ldr	r3, .L11+40
 114:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 315              		.loc 1 114 0
 316 0072 4046     		mov	r0, r8
 107:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_tx_running = pdFALSE;
 317              		.loc 1 107 0
 318 0074 1E80     		strh	r6, [r3]	@ movhi
 108:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		
 319              		.loc 1 108 0
 320 0076 114B     		ldr	r3, .L11+44
 321 0078 1E70     		strb	r6, [r3]
 110:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER &= ~U1IER_ETBEI;               						// Desabilita a interrupção de buffer vazio de transmis
 322              		.loc 1 110 0
 323 007a 2368     		ldr	r3, [r4]
 324 007c 43EA0803 		orr	r3, r3, r8
 325 0080 2360     		str	r3, [r4]
 111:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
 326              		.loc 1 111 0
 327 0082 2368     		ldr	r3, [r4]
 328 0084 23F00203 		bic	r3, r3, #2
 329 0088 2360     		str	r3, [r4]
 114:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 330              		.loc 1 114 0
 331 008a BDE8F883 		pop	{r3, r4, r5, r6, r7, r8, r9, pc}
 332              	.L12:
 333 008e 00BF     		.align	2
 334              	.L11:
 335 0090 C4C00F40 		.word	1074774212
 336 0094 04000140 		.word	1073807364
 337 0098 00C00240 		.word	1073922048
 338 009c 08000140 		.word	1073807368
 339 00a0 00000140 		.word	1073807360
 340 00a4 14000140 		.word	1073807380
 341 00a8 00000000 		.word	.LANCHOR0
 342 00ac 00000000 		.word	.LANCHOR1
 343 00b0 00000000 		.word	.LANCHOR2
 344 00b4 00000000 		.word	.LANCHOR3
 345 00b8 00000000 		.word	.LANCHOR4
 346 00bc 00000000 		.word	.LANCHOR5
 347              		.cfi_endproc
 348              	.LFE0:
 350              		.section	.text.uart1_GetChar,"ax",%progbits
 351              		.align	1
 352              		.global	uart1_GetChar
 353              		.thumb
 354              		.thumb_func
 356              	uart1_GetChar:
 357              	.LFB4:
 168:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #else
 169:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_SetBaudrate(u32 baudrate) {
 170:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u32 f_div;
 171:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LCR = U1LCR_DLAB_ENABLE;             						// Seleciona os latches de devisões para ajusta do 
 172:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	f_div = ( PCLK / 16 ) / baudrate ;							// Calcular divisor para o baudrate
 173:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1DLL = f_div%256;      		  							// Ajusta o baudrate byte baixo
 174:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1DLM = f_div/256;		    								// Ajusta o baudrate byte alto
 175:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#if defined(cortexm3)
 176:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FDR = 0x10;												// Sem ajuste fino no baudrate
 177:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#endif
 178:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1LCR = (UART1_MODE & ~U1LCR_DLAB_ENABLE);					// Configura o modo de trabalho da uart e desativ
 179:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 180:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #endif
 181:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 182:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 183:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // UART RECEPÇÂO
 184:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 185:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 186:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 187:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 188:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Captura o próximo byte recebido na UART
 189:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Ponteiro para da variavel char para o retorno do byte recebido
 190:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		pdPASS indicando que existe caractere recebido ou o código do erro
 191:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 192:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_GetChar(u8 *ch) {
 358              		.loc 1 192 0
 359              		.cfi_startproc
 360              		@ args = 0, pretend = 0, frame = 0
 361              		@ frame_needed = 0, uses_anonymous_args = 0
 362              	.LVL33:
 363 0000 38B5     		push	{r3, r4, r5, lr}
 364              	.LCFI3:
 365              		.cfi_def_cfa_offset 16
 366              		.cfi_offset 3, -16
 367              		.cfi_offset 4, -12
 368              		.cfi_offset 5, -8
 369              		.cfi_offset 14, -4
 370              		.loc 1 192 0
 371 0002 0546     		mov	r5, r0
 193:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	int ret;
 194:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 195:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if ( u1_buf_rx.size == 0 )								// Checa se o buffer de recepção ainda não foi criado
 372              		.loc 1 195 0
 373 0004 0D48     		ldr	r0, .L17
 374              	.LVL34:
 375 0006 8388     		ldrh	r3, [r0, #4]
 376 0008 9BB2     		uxth	r3, r3
 377 000a 8BB1     		cbz	r3, .L15
 196:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****    		return errBUFFER_NO_EXIST;            				// Retorna indicando erro
 197:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 198:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if ( u1_buf_rx.datalength ) {							// Checo de o buffer de recepção contêm dados recebidos pela U
 378              		.loc 1 198 0
 379 000c C388     		ldrh	r3, [r0, #6]
 380 000e 9BB2     		uxth	r3, r3
 381 0010 8BB1     		cbz	r3, .L16
 199:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER &= ~U1IER_ERBFI;								// Desabilita interrupção de dados prontos na recepção e CTI (SIMUL
 382              		.loc 1 199 0
 383 0012 0B4C     		ldr	r4, .L17+4
 384 0014 2368     		ldr	r3, [r4]
 385 0016 23F00103 		bic	r3, r3, #1
 386 001a 2360     		str	r3, [r4]
 200:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		nop();
 387              		.loc 1 200 0
 388              		.syntax unified
 389              	@ 200 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c" 1
 390 001c 00BF     		nop
 391              	@ 0 "" 2
 201:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		*ch = buffer_GetFromFront(&u1_buf_rx);				// Captura os dados do inicio do buffer
 392              		.loc 1 201 0
 393              		.thumb
 394              		.syntax unified
 395 001e FFF7FEFF 		bl	buffer_GetFromFront
 396              	.LVL35:
 397 0022 2870     		strb	r0, [r5]
 202:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER |= U1IER_ERBFI;								// Habilita interrupção de dados prontos na recepção e CTI (SIMULADO
 398              		.loc 1 202 0
 399 0024 2368     		ldr	r3, [r4]
 203:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		ret = pdPASS;
 400              		.loc 1 203 0
 401 0026 0120     		movs	r0, #1
 202:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER |= U1IER_ERBFI;								// Habilita interrupção de dados prontos na recepção e CTI (SIMULADO
 402              		.loc 1 202 0
 403 0028 43F00103 		orr	r3, r3, #1
 404 002c 2360     		str	r3, [r4]
 405              	.LVL36:
 406 002e 38BD     		pop	{r3, r4, r5, pc}
 407              	.LVL37:
 408              	.L15:
 196:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 409              		.loc 1 196 0
 410 0030 6FF00B00 		mvn	r0, #11
 411 0034 38BD     		pop	{r3, r4, r5, pc}
 412              	.LVL38:
 413              	.L16:
 204:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	} else
 205:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		ret = errBUFFER_EMPTY;
 414              		.loc 1 205 0
 415 0036 6FF00A00 		mvn	r0, #10
 206:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 207:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return ret;
 208:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 416              		.loc 1 208 0
 417 003a 38BD     		pop	{r3, r4, r5, pc}
 418              	.LVL39:
 419              	.L18:
 420              		.align	2
 421              	.L17:
 422 003c 00000000 		.word	.LANCHOR1
 423 0040 04000140 		.word	1073807364
 424              		.cfi_endproc
 425              	.LFE4:
 427              		.section	.text.uart1_ClearBufferRx,"ax",%progbits
 428              		.align	1
 429              		.global	uart1_ClearBufferRx
 430              		.thumb
 431              		.thumb_func
 433              	uart1_ClearBufferRx:
 434              	.LFB5:
 209:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 210:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 211:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 212:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Limpa o buffer e FIFO de recepção
 213:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	Nenhum
 214:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Nada
 215:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 216:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_ClearBufferRx(void) {
 435              		.loc 1 216 0
 436              		.cfi_startproc
 437              		@ args = 0, pretend = 0, frame = 0
 438              		@ frame_needed = 0, uses_anonymous_args = 0
 439 0000 10B5     		push	{r4, lr}
 440              	.LCFI4:
 441              		.cfi_def_cfa_offset 8
 442              		.cfi_offset 4, -8
 443              		.cfi_offset 14, -4
 217:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER &= ~U1IER_ERBFI;				// Desabilita interrupção de dados prontos na recepção e CTI (SIMULADOR 
 444              		.loc 1 217 0
 445 0002 0A4C     		ldr	r4, .L20
 446 0004 2368     		ldr	r3, [r4]
 447 0006 23F00103 		bic	r3, r3, #1
 448 000a 2360     		str	r3, [r4]
 218:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nop();
 449              		.loc 1 218 0
 450              		.syntax unified
 451              	@ 218 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c" 1
 452 000c 00BF     		nop
 453              	@ 0 "" 2
 219:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_overflow_rx = 0; 				// Limpa overflow do buffer de recepção
 454              		.loc 1 219 0
 455              		.thumb
 456              		.syntax unified
 457 000e 084B     		ldr	r3, .L20+4
 458 0010 0022     		movs	r2, #0
 459 0012 1A80     		strh	r2, [r3]	@ movhi
 220:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1FCR = U1FCR_RX_FIFO_RESET;		// Limpa RX FIFO
 460              		.loc 1 220 0
 461 0014 074B     		ldr	r3, .L20+8
 462 0016 0222     		movs	r2, #2
 463 0018 1A60     		str	r2, [r3]
 221:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	buffer_Clear(&u1_buf_rx);			// Limpa o buffer de recepção
 464              		.loc 1 221 0
 465 001a 0748     		ldr	r0, .L20+12
 466 001c FFF7FEFF 		bl	buffer_Clear
 467              	.LVL40:
 222:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER |= U1IER_ERBFI;				// Habilita interrupção de dados prontos na recepção e CTI (SIMULADOR PRO
 468              		.loc 1 222 0
 469 0020 2368     		ldr	r3, [r4]
 470 0022 43F00103 		orr	r3, r3, #1
 471 0026 2360     		str	r3, [r4]
 472 0028 10BD     		pop	{r4, pc}
 473              	.L21:
 474 002a 00BF     		.align	2
 475              	.L20:
 476 002c 04000140 		.word	1073807364
 477 0030 00000000 		.word	.LANCHOR4
 478 0034 08000140 		.word	1073807368
 479 0038 00000000 		.word	.LANCHOR1
 480              		.cfi_endproc
 481              	.LFE5:
 483              		.section	.text.uart1_CountRxOverflow,"ax",%progbits
 484              		.align	1
 485              		.global	uart1_CountRxOverflow
 486              		.thumb
 487              		.thumb_func
 489              	uart1_CountRxOverflow:
 490              	.LFB6:
 223:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 224:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 225:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 226:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Retorna a quantidade de bytes do estouro do buffer de recepção
 227:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	Nenhum
 228:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Nada
 229:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 230:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** u32 uart1_CountRxOverflow (void) {
 491              		.loc 1 230 0
 492              		.cfi_startproc
 493              		@ args = 0, pretend = 0, frame = 0
 494              		@ frame_needed = 0, uses_anonymous_args = 0
 495              		@ link register save eliminated.
 231:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u32 count = u1_overflow_rx;
 496              		.loc 1 231 0
 497 0000 024B     		ldr	r3, .L23
 232:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u1_overflow_rx = 0;
 498              		.loc 1 232 0
 499 0002 0022     		movs	r2, #0
 231:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u32 count = u1_overflow_rx;
 500              		.loc 1 231 0
 501 0004 1888     		ldrh	r0, [r3]
 502              	.LVL41:
 503              		.loc 1 232 0
 504 0006 1A80     		strh	r2, [r3]	@ movhi
 233:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return count;
 234:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 505              		.loc 1 234 0
 506 0008 80B2     		uxth	r0, r0
 507              	.LVL42:
 508 000a 7047     		bx	lr
 509              	.L24:
 510              		.align	2
 511              	.L23:
 512 000c 00000000 		.word	.LANCHOR4
 513              		.cfi_endproc
 514              	.LFE6:
 516              		.section	.text.uart1_BufferRxIsEmpty,"ax",%progbits
 517              		.align	1
 518              		.global	uart1_BufferRxIsEmpty
 519              		.thumb
 520              		.thumb_func
 522              	uart1_BufferRxIsEmpty:
 523              	.LFB7:
 235:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 236:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 237:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Checa se buffer de recepção está vazio
 238:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	Nenhum
 239:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		pdTRUE se o buffer estiver vazio
 240:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //				pdFALSE se o buffer contiver dados recebidos
 241:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 242:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_BufferRxIsEmpty(void) {
 524              		.loc 1 242 0
 525              		.cfi_startproc
 526              		@ args = 0, pretend = 0, frame = 0
 527              		@ frame_needed = 0, uses_anonymous_args = 0
 528              		@ link register save eliminated.
 243:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if (u1_buf_rx.datalength == 0)
 529              		.loc 1 243 0
 530 0000 034B     		ldr	r3, .L26
 531 0002 D888     		ldrh	r0, [r3, #6]
 532 0004 80B2     		uxth	r0, r0
 244:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			return pdTRUE;
 245:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	else	return pdFALSE;
 246:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 533              		.loc 1 246 0
 534 0006 B0FA80F0 		clz	r0, r0
 535 000a 4009     		lsrs	r0, r0, #5
 536 000c 7047     		bx	lr
 537              	.L27:
 538 000e 00BF     		.align	2
 539              	.L26:
 540 0010 00000000 		.word	.LANCHOR1
 541              		.cfi_endproc
 542              	.LFE7:
 544              		.section	.text.uart1_BufferQtdRx,"ax",%progbits
 545              		.align	1
 546              		.global	uart1_BufferQtdRx
 547              		.thumb
 548              		.thumb_func
 550              	uart1_BufferQtdRx:
 551              	.LFB8:
 247:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 248:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 249:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Retorna com a quantidade de bytes recebidos no buffer de recepção
 250:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	Nenhum
 251:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Retorna com a quantidade de bytes recebidos no buffer de recepção
 252:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 253:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_BufferQtdRx(void) {
 552              		.loc 1 253 0
 553              		.cfi_startproc
 554              		@ args = 0, pretend = 0, frame = 0
 555              		@ frame_needed = 0, uses_anonymous_args = 0
 556              		@ link register save eliminated.
 254:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return u1_buf_rx.datalength;
 557              		.loc 1 254 0
 558 0000 014B     		ldr	r3, .L29
 559 0002 D888     		ldrh	r0, [r3, #6]
 255:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 560              		.loc 1 255 0
 561 0004 80B2     		uxth	r0, r0
 562 0006 7047     		bx	lr
 563              	.L30:
 564              		.align	2
 565              	.L29:
 566 0008 00000000 		.word	.LANCHOR1
 567              		.cfi_endproc
 568              	.LFE8:
 570              		.section	.text.uart1_GetBufferRx,"ax",%progbits
 571              		.align	1
 572              		.global	uart1_GetBufferRx
 573              		.thumb
 574              		.thumb_func
 576              	uart1_GetBufferRx:
 577              	.LFB9:
 256:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 257:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 258:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição: 	Retorna o ponteiro da estrutura do buffer de recepção
 259:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros:	Nenhum
 260:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Retorna o ponteiro da estrutura do buffer de recepção
 261:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 262:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** buffer_t *uart1_GetBufferRx(void) {
 578              		.loc 1 262 0
 579              		.cfi_startproc
 580              		@ args = 0, pretend = 0, frame = 0
 581              		@ frame_needed = 0, uses_anonymous_args = 0
 582              		@ link register save eliminated.
 263:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return &u1_buf_rx;
 264:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 583              		.loc 1 264 0
 584 0000 0048     		ldr	r0, .L32
 585 0002 7047     		bx	lr
 586              	.L33:
 587              		.align	2
 588              	.L32:
 589 0004 00000000 		.word	.LANCHOR1
 590              		.cfi_endproc
 591              	.LFE9:
 593              		.section	.text.uart1_PutChar,"ax",%progbits
 594              		.align	1
 595              		.global	uart1_PutChar
 596              		.thumb
 597              		.thumb_func
 599              	uart1_PutChar:
 600              	.LFB10:
 265:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 266:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 267:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // UART TRANSMISSAO
 268:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 269:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 270:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 271:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 272:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Coloca um caractere na fila de transmissão
 273:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Caractere a ser transmitindo
 274:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Retorna pdPASS ou o código de erro
 275:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 276:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_PutChar(n16 ch) {
 601              		.loc 1 276 0
 602              		.cfi_startproc
 603              		@ args = 0, pretend = 0, frame = 0
 604              		@ frame_needed = 0, uses_anonymous_args = 0
 605              	.LVL43:
 277:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	int sts;
 278:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 279:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if ( u1_buf_tx.size == 0 )												// Checa se o buffer de transmissão ainda não foi criado
 606              		.loc 1 279 0
 607 0000 154B     		ldr	r3, .L42
 276:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	int sts;
 608              		.loc 1 276 0
 609 0002 70B5     		push	{r4, r5, r6, lr}
 610              	.LCFI5:
 611              		.cfi_def_cfa_offset 16
 612              		.cfi_offset 4, -16
 613              		.cfi_offset 5, -12
 614              		.cfi_offset 6, -8
 615              		.cfi_offset 14, -4
 616              		.loc 1 279 0
 617 0004 9B88     		ldrh	r3, [r3, #4]
 618 0006 9BB2     		uxth	r3, r3
 619 0008 03B3     		cbz	r3, .L37
 280:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****    		return errBUFFER_NO_EXIST;                          				// Retorna indicando erro
 281:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 282:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	// É obrigatório incluirmos o char no buffer, mesmo que vamos retirá-lo logo em seguida caso u3_tx
 283:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	//	Se não for dessa forma o e usar U3THR = ch haverá erro de sincronismo entre os dados chegas e d
 284:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	// Isto porque o manipulador de interrupção (uart3_ISR) pode atender a mais de uma interrupção sim
 285:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 286:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	do {
 287:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER &= ~U1IER_ETBEI;                 								// Desativa a interrupção de transmissão
 620              		.loc 1 287 0
 621 000a 144C     		ldr	r4, .L42+4
 288:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		nop();
 289:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		sts = buffer_AddToEnd(&u1_buf_tx, ch);
 622              		.loc 1 289 0
 623 000c C5B2     		uxtb	r5, r0
 624              	.LVL44:
 625              	.L40:
 287:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		nop();
 626              		.loc 1 287 0
 627 000e 2368     		ldr	r3, [r4]
 628 0010 124E     		ldr	r6, .L42+4
 629 0012 23F00203 		bic	r3, r3, #2
 630 0016 2360     		str	r3, [r4]
 288:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		nop();
 631              		.loc 1 288 0
 632              		.syntax unified
 633              	@ 288 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c" 1
 634 0018 00BF     		nop
 635              	@ 0 "" 2
 636              		.loc 1 289 0
 637              		.thumb
 638              		.syntax unified
 639 001a 0F48     		ldr	r0, .L42
 640 001c 2946     		mov	r1, r5
 641 001e FFF7FEFF 		bl	buffer_AddToEnd
 642              	.LVL45:
 290:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER |= U1IER_ETBEI;                  								// Habilita a interrupção de transmissão
 643              		.loc 1 290 0
 644 0022 2368     		ldr	r3, [r4]
 291:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 292:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		CRITICAL_WAIT;														// Caso exista algum OS, pode trocar de contexto
 293:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	} while (sts == errBUFFER_FULL);
 645              		.loc 1 293 0
 646 0024 0A30     		adds	r0, r0, #10
 647              	.LVL46:
 290:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 		U1IER |= U1IER_ETBEI;                  								// Habilita a interrupção de transmissão
 648              		.loc 1 290 0
 649 0026 43F00203 		orr	r3, r3, #2
 650 002a 2360     		str	r3, [r4]
 651              		.loc 1 293 0
 652 002c EFD0     		beq	.L40
 294:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 295:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if (!u1_tx_running) {													// Checa se existe dado sendo transmitido
 653              		.loc 1 295 0
 654 002e 0C4C     		ldr	r4, .L42+8
 655 0030 2378     		ldrb	r3, [r4]	@ zero_extendqisi2
 656 0032 73B9     		cbnz	r3, .L38
 657              	.LVL47:
 658              	.LBB20:
 659              	.LBB21:
 296:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   		U1THR = buffer_GetFromFront(&u1_buf_tx);							// Atribui o dado do buffer ao registrador de tr
 660              		.loc 1 296 0
 661 0034 0848     		ldr	r0, .L42
 662              	.LVL48:
 663 0036 FFF7FEFF 		bl	buffer_GetFromFront
 664              	.LVL49:
 665 003a 0A4B     		ldr	r3, .L42+12
 666 003c 1860     		str	r0, [r3]
 297:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   		u1_tx_running = pdTRUE;												// Sinaliza que existe dado sendo trasnmitido
 667              		.loc 1 297 0
 668 003e 0120     		movs	r0, #1
 669 0040 2070     		strb	r0, [r4]
 298:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   		U1IER |= U1IER_ETBEI;                  								// Habilita a interrupção de transmissão
 670              		.loc 1 298 0
 671 0042 3368     		ldr	r3, [r6]
 672 0044 43F00203 		orr	r3, r3, #2
 673 0048 3360     		str	r3, [r6]
 674 004a 70BD     		pop	{r4, r5, r6, pc}
 675              	.LVL50:
 676              	.L37:
 677              	.LBE21:
 678              	.LBE20:
 280:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 679              		.loc 1 280 0
 680 004c 6FF00B00 		mvn	r0, #11
 681              	.LVL51:
 682 0050 70BD     		pop	{r4, r5, r6, pc}
 683              	.LVL52:
 684              	.L38:
 299:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****    	}
 300:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 301:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	return pdPASS;
 685              		.loc 1 301 0
 686 0052 0120     		movs	r0, #1
 687              	.LVL53:
 302:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 688              		.loc 1 302 0
 689 0054 70BD     		pop	{r4, r5, r6, pc}
 690              	.L43:
 691 0056 00BF     		.align	2
 692              	.L42:
 693 0058 00000000 		.word	.LANCHOR3
 694 005c 04000140 		.word	1073807364
 695 0060 00000000 		.word	.LANCHOR5
 696 0064 00000140 		.word	1073807360
 697              		.cfi_endproc
 698              	.LFE10:
 700              		.section	.text.uart1_BasicPutChar,"ax",%progbits
 701              		.align	1
 702              		.global	uart1_BasicPutChar
 703              		.thumb
 704              		.thumb_func
 706              	uart1_BasicPutChar:
 707              	.LFB11:
 303:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 304:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 305:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Coloca um caractere na fila de transmissão. FUNÇÃO UTIL PARA DEBUG ONDE NÃO PRECISA I
 306:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Caractere a ser transmitindo
 307:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Retorna pdPASS ou o código de erro
 308:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 309:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_BasicPutChar(n16 ch) {
 708              		.loc 1 309 0
 709              		.cfi_startproc
 710              		@ args = 0, pretend = 0, frame = 0
 711              		@ frame_needed = 0, uses_anonymous_args = 0
 712              		@ link register save eliminated.
 713              	.LVL54:
 310:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	while (!(U1LSR & U1LSR_THRE)) 								// Espero até que o buffer TX fique vazio
 714              		.loc 1 310 0
 715 0000 044A     		ldr	r2, .L48
 716              	.L45:
 717 0002 1368     		ldr	r3, [r2]
 718 0004 9B06     		lsls	r3, r3, #26
 719 0006 FCD5     		bpl	.L45
 311:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   		CRITICAL_WAIT;        									// Caso exista algum OS, pode trocar de contexto
 312:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1THR = (u8)ch;												// Atualiza o registrador de TX uart com o dado
 720              		.loc 1 312 0
 721 0008 034B     		ldr	r3, .L48+4
 722 000a C0B2     		uxtb	r0, r0
 723              	.LVL55:
 724 000c 1860     		str	r0, [r3]
 313:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return pdPASS;
 314:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 725              		.loc 1 314 0
 726 000e 0120     		movs	r0, #1
 727 0010 7047     		bx	lr
 728              	.L49:
 729 0012 00BF     		.align	2
 730              	.L48:
 731 0014 14000140 		.word	1073807380
 732 0018 00000140 		.word	1073807360
 733              		.cfi_endproc
 734              	.LFE11:
 736              		.section	.text.uart1_SpaceTx,"ax",%progbits
 737              		.align	1
 738              		.global	uart1_SpaceTx
 739              		.thumb
 740              		.thumb_func
 742              	uart1_SpaceTx:
 743              	.LFB12:
 315:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 316:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 317:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Captura o espaço disponivel para transmissão
 318:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Nenhum
 319:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		O tamanho em bytes do espaço disponivel para transmissão
 320:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 321:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** u16 uart1_SpaceTx(void) {
 744              		.loc 1 321 0
 745              		.cfi_startproc
 746              		@ args = 0, pretend = 0, frame = 0
 747              		@ frame_needed = 0, uses_anonymous_args = 0
 748              		@ link register save eliminated.
 322:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	u16 qtd;
 323:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	
 324:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER &= ~U1IER_ETBEI;                 								// Desativa a interrupção de transmissão
 749              		.loc 1 324 0
 750 0000 074B     		ldr	r3, .L51
 751 0002 1A68     		ldr	r2, [r3]
 752 0004 22F00202 		bic	r2, r2, #2
 753 0008 1A60     		str	r2, [r3]
 325:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nop();
 754              		.loc 1 325 0
 755              		.syntax unified
 756              	@ 325 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c" 1
 757 000a 00BF     		nop
 758              	@ 0 "" 2
 326:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	qtd = (u16)(u1_buf_tx.size - u1_buf_tx.datalength);					// Retorna com o espaço disponivel
 759              		.loc 1 326 0
 760              		.thumb
 761              		.syntax unified
 762 000c 0549     		ldr	r1, .L51+4
 763 000e 8A88     		ldrh	r2, [r1, #4]
 764 0010 C888     		ldrh	r0, [r1, #6]
 765              	.LVL56:
 327:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER |= U1IER_ETBEI;                  								// Habilita a interrupção de transmissão
 766              		.loc 1 327 0
 767 0012 1968     		ldr	r1, [r3]
 328:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	return qtd;
 768              		.loc 1 328 0
 769 0014 101A     		subs	r0, r2, r0
 770              	.LVL57:
 327:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER |= U1IER_ETBEI;                  								// Habilita a interrupção de transmissão
 771              		.loc 1 327 0
 772 0016 41F00201 		orr	r1, r1, #2
 773 001a 1960     		str	r1, [r3]
 329:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 774              		.loc 1 329 0
 775 001c 80B2     		uxth	r0, r0
 776 001e 7047     		bx	lr
 777              	.L52:
 778              		.align	2
 779              	.L51:
 780 0020 04000140 		.word	1073807364
 781 0024 00000000 		.word	.LANCHOR3
 782              		.cfi_endproc
 783              	.LFE12:
 785              		.section	.text.uart1_FlushTx,"ax",%progbits
 786              		.align	1
 787              		.global	uart1_FlushTx
 788              		.thumb
 789              		.thumb_func
 791              	uart1_FlushTx:
 792              	.LFB13:
 330:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 331:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 332:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Remove todos os dados da fila de transmissão
 333:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Nenhum
 334:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		Nada
 335:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 336:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_FlushTx(void) {
 793              		.loc 1 336 0
 794              		.cfi_startproc
 795              		@ args = 0, pretend = 0, frame = 0
 796              		@ frame_needed = 0, uses_anonymous_args = 0
 797              		@ link register save eliminated.
 337:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	U1IER &= ~U1IER_ETBEI;                					// Desabilita a interrupção de transmissão
 798              		.loc 1 337 0
 799 0000 054A     		ldr	r2, .L54
 800 0002 1368     		ldr	r3, [r2]
 801 0004 23F00203 		bic	r3, r3, #2
 802 0008 1360     		str	r3, [r2]
 338:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	nop();
 803              		.loc 1 338 0
 804              		.syntax unified
 805              	@ 338 "uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c" 1
 806 000a 00BF     		nop
 807              	@ 0 "" 2
 339:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	U1FCR = U1FCR_TX_FIFO_RESET;          					// Limpa a FIFO de transmissão
 808              		.loc 1 339 0
 809              		.thumb
 810              		.syntax unified
 811 000c 034B     		ldr	r3, .L54+4
 812 000e 0422     		movs	r2, #4
 813 0010 1A60     		str	r2, [r3]
 340:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	buffer_Clear(&u1_buf_tx);								// Limpa os indeces do buffer TX da UART
 814              		.loc 1 340 0
 815 0012 0348     		ldr	r0, .L54+8
 816 0014 FFF7FEBF 		b	buffer_Clear
 817              	.LVL58:
 818              	.L55:
 819              		.align	2
 820              	.L54:
 821 0018 04000140 		.word	1073807364
 822 001c 08000140 		.word	1073807368
 823 0020 00000000 		.word	.LANCHOR3
 824              		.cfi_endproc
 825              	.LFE13:
 827              		.section	.text.uart1_EmptyTx,"ax",%progbits
 828              		.align	1
 829              		.global	uart1_EmptyTx
 830              		.thumb
 831              		.thumb_func
 833              	uart1_EmptyTx:
 834              	.LFB14:
 341:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 342:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 343:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 344:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Retorna o status do registrador de transmissão de dados
 345:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Nenhum
 346:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		pdFALSE = Se o registradores U0THR ou U0TSR não estão vazios
 347:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //				pdTRUE = Se o registradores U0THR ou U0TSR estão vazios
 348:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 349:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_EmptyTx(void) {
 835              		.loc 1 349 0
 836              		.cfi_startproc
 837              		@ args = 0, pretend = 0, frame = 0
 838              		@ frame_needed = 0, uses_anonymous_args = 0
 839              		@ link register save eliminated.
 350:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	if ((U1LSR & (U1LSR_THRE | U1LSR_TEMT)) == (U1LSR_THRE | U1LSR_TEMT))
 840              		.loc 1 350 0
 841 0000 044B     		ldr	r3, .L57
 842 0002 1868     		ldr	r0, [r3]
 843 0004 00F06000 		and	r0, r0, #96
 351:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   			return pdTRUE;
 352:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	else	return pdFALSE;
 353:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 844              		.loc 1 353 0
 845 0008 A0F16003 		sub	r3, r0, #96
 846 000c 5842     		rsbs	r0, r3, #0
 847 000e 5841     		adcs	r0, r0, r3
 848 0010 7047     		bx	lr
 849              	.L58:
 850 0012 00BF     		.align	2
 851              	.L57:
 852 0014 14000140 		.word	1073807380
 853              		.cfi_endproc
 854              	.LFE14:
 856              		.section	.text.uart1_WriteTx,"ax",%progbits
 857              		.align	1
 858              		.global	uart1_WriteTx
 859              		.thumb
 860              		.thumb_func
 862              	uart1_WriteTx:
 863              	.LFB15:
 354:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 355:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #if !defined(FREE_RTOS)
 356:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 357:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Adiociona N caracteres no buffer de transmissão
 358:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Ponteiro do buffer 
 359:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //				Quantidade de caracteres as serem transmitidos
 360:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		pdPASS = Transmitido com sucesso ou o código do erro
 361:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 362:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** int uart1_WriteTx(u8 *buffer, u16 count) {
 864              		.loc 1 362 0
 865              		.cfi_startproc
 866              		@ args = 0, pretend = 0, frame = 0
 867              		@ frame_needed = 0, uses_anonymous_args = 0
 868              	.LVL59:
 869 0000 38B5     		push	{r3, r4, r5, lr}
 870              	.LCFI6:
 871              		.cfi_def_cfa_offset 16
 872              		.cfi_offset 3, -16
 873              		.cfi_offset 4, -12
 874              		.cfi_offset 5, -8
 875              		.cfi_offset 14, -4
 876              		.loc 1 362 0
 877 0002 0C46     		mov	r4, r1
 878 0004 0546     		mov	r5, r0
 363:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	if (count > uart1_SpaceTx())									// Checa se exste espaço suficiente no buffer de TX de espaço
 879              		.loc 1 363 0
 880 0006 FFF7FEFF 		bl	uart1_SpaceTx
 881              	.LVL60:
 882 000a A042     		cmp	r0, r4
 883 000c 0AD2     		bcs	.L61
 884              	.LVL61:
 885              	.L60:
 364:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****    		return errBUFFER_FULL;										// Retorna cheio
 886              		.loc 1 364 0
 887 000e 6FF00900 		mvn	r0, #9
 888 0012 38BD     		pop	{r3, r4, r5, pc}
 889              	.LVL62:
 890              	.L65:
 365:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 366:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	while (count && (uart1_PutChar(*buffer++) >= 0))				// Faça enquanto tem dados a serem transmiti
 891              		.loc 1 366 0 discriminator 1
 892 0014 15F8010B 		ldrb	r0, [r5], #1	@ zero_extendqisi2
 893              	.LVL63:
 894 0018 FFF7FEFF 		bl	uart1_PutChar
 895              	.LVL64:
 896 001c 0028     		cmp	r0, #0
 897 001e F6DB     		blt	.L60
 367:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	count--;
 898              		.loc 1 367 0
 899 0020 013C     		subs	r4, r4, #1
 900              	.LVL65:
 901 0022 A4B2     		uxth	r4, r4
 902              	.LVL66:
 903              	.L61:
 366:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	count--;
 904              		.loc 1 366 0
 905 0024 002C     		cmp	r4, #0
 906 0026 F5D1     		bne	.L65
 368:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 369:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	return (count ? errBUFFER_FULL : pdPASS); 						// Se count = 0 retorna 0 (Sucesso) senão retorn
 907              		.loc 1 369 0
 908 0028 0120     		movs	r0, #1
 370:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 909              		.loc 1 370 0
 910 002a 38BD     		pop	{r3, r4, r5, pc}
 911              		.cfi_endproc
 912              	.LFE15:
 914              		.section	.text.uart1_PutString,"ax",%progbits
 915              		.align	1
 916              		.global	uart1_PutString
 917              		.thumb
 918              		.thumb_func
 920              	uart1_PutString:
 921              	.LFB16:
 371:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 372:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 373:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Descrição:	Transmite uma string até que encontre o caractere NULO '\0' ou que o buffer estoura
 374:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //				ATENÇÂO: o Compilador já adiciona \0 na string do tipo "xyz" EX: "\r\r\nHello World!\r\r\n" 
 375:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Parametros: 	Ponteiro da string
 376:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // Retorna:		O ponteiro da string. 
 377:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //					Retorna NULO se a string foi completamente transmitindo 
 378:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //					Ou retorna o ponteiro do próximo caractere a ser transmitido
 379:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // OBS: Se a string for maior que o espaço disponivel no buffer de TX pode ocorrer que a string não
 380:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // ------------------------------------------------------------------------------------------------
 381:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** u8 *uart1_PutString(u8 *str) {
 922              		.loc 1 381 0
 923              		.cfi_startproc
 924              		@ args = 0, pretend = 0, frame = 0
 925              		@ frame_needed = 0, uses_anonymous_args = 0
 926              	.LVL67:
 927 0000 38B5     		push	{r3, r4, r5, lr}
 928              	.LCFI7:
 929              		.cfi_def_cfa_offset 16
 930              		.cfi_offset 3, -16
 931              		.cfi_offset 4, -12
 932              		.cfi_offset 5, -8
 933              		.cfi_offset 14, -4
 934 0002 0446     		mov	r4, r0
 935              	.LVL68:
 936              	.L68:
 937 0004 2546     		mov	r5, r4
 938              	.LVL69:
 382:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****    	register char ch;
 383:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 384:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	while ((ch = *str) && (uart1_PutChar(ch) >= 0))				// Adiciona para transmissão enquanto tenha d
 939              		.loc 1 384 0
 940 0006 14F8010B 		ldrb	r0, [r4], #1	@ zero_extendqisi2
 941              	.LVL70:
 942 000a 18B1     		cbz	r0, .L71
 943              		.loc 1 384 0 is_stmt 0 discriminator 1
 944 000c FFF7FEFF 		bl	uart1_PutChar
 945              	.LVL71:
 946 0010 0028     		cmp	r0, #0
 947 0012 F7DA     		bge	.L68
 948              	.L71:
 385:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	str++;
 386:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 387:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	return str;													// Retorna o ponteiro atual da string
 388:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 949              		.loc 1 388 0 is_stmt 1
 950 0014 2846     		mov	r0, r5
 951 0016 38BD     		pop	{r3, r4, r5, pc}
 952              		.cfi_endproc
 953              	.LFE16:
 955              		.section	.text.uart1_ISR,"ax",%progbits
 956              		.align	1
 957              		.global	uart1_ISR
 958              		.thumb
 959              		.thumb_func
 961              	uart1_ISR:
 962              	.LFB17:
 389:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** #endif // FREE_RTOS
 390:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 391:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 392:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // UART SERVIÇO DE INTERRUPÇÕES
 393:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** // 		Descrição: 	Esta função implementa o ISR da UART1
 394:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 395:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** //#################################################################################################
 396:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** void uart1_ISR (void) {
 963              		.loc 1 396 0
 964              		.cfi_startproc
 965              		@ args = 0, pretend = 0, frame = 0
 966              		@ frame_needed = 0, uses_anonymous_args = 0
 967 0000 70B5     		push	{r4, r5, r6, lr}
 968              	.LCFI8:
 969              		.cfi_def_cfa_offset 16
 970              		.cfi_offset 4, -16
 971              		.cfi_offset 5, -12
 972              		.cfi_offset 6, -8
 973              		.cfi_offset 14, -4
 397:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	ISR_ENTRY;																// Procedimento para entrada da interrupção
 398:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 399:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	u8 int_flags;
 400:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 401:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	while ( !((int_flags = U1IIR) & U1IIR_NO_INT) ) {							// Faça para todos os pedidos de interru
 974              		.loc 1 401 0
 975 0002 234D     		ldr	r5, .L91
 402:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	switch (int_flags & U1IIR_ID_MASK) {									// Identifica a fonte de interrupção
 403:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	case U1IIR_RLS_INT:                									// Caso recebeu uma INT de erro na linha de recepç
 404:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	U1LSR;                         									// Limpa registrador de status de linha
 405:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	break;
 406:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 407:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         // ADICIONA NO BUFFER RX OS DADOS DA FIFO
 408:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         // No modo de trigger acima de 1 byte, se a quantidade de bytes da FIFO de recepção
 409:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	// não alcançar o nível do trigger os dados da FIFO serão adicionados
 410:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	// ao buffer de recepção pela interrupção de timerout da UART (U3IIR_CTI_INT)
 411:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	case U1IIR_CTI_INT:                									// Character Timeout Indicator. Dados na FIFO RX
 412:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	case U1IIR_RDA_INT:                									// Caso que exista bytes disponivel recepção
 413:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      		do { 
 414:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       			if (buffer_AddToEnd(&u1_buf_rx, U1RBR) == errBUFFER_FULL)
 415:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 					u1_overflow_rx++;
 416:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       		} while(U1LSR & U1LSR_RDR);										// Faça enquanto existe dados validos na FIFO de recep
 976              		.loc 1 416 0
 977 0004 234C     		ldr	r4, .L91+4
 978              	.L73:
 401:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	switch (int_flags & U1IIR_ID_MASK) {									// Identifica a fonte de interrupção
 979              		.loc 1 401 0
 980 0006 2B68     		ldr	r3, [r5]
 981              	.LVL72:
 982 0008 DBB2     		uxtb	r3, r3
 983 000a DA07     		lsls	r2, r3, #31
 984 000c 3BD4     		bmi	.L90
 402:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****     	switch (int_flags & U1IIR_ID_MASK) {									// Identifica a fonte de interrupção
 985              		.loc 1 402 0
 986 000e 03F00E03 		and	r3, r3, #14
 987              	.LVL73:
 988 0012 0C2B     		cmp	r3, #12
 989 0014 31D8     		bhi	.L74
 990 0016 DFE803F0 		tbb	[pc, r3]
 991              	.L76:
 992 001a 33       		.byte	(.L89-.L76)/2
 993 001b 30       		.byte	(.L74-.L76)/2
 994 001c 1A       		.byte	(.L77-.L76)/2
 995 001d 30       		.byte	(.L74-.L76)/2
 996 001e 09       		.byte	(.L78-.L76)/2
 997 001f 30       		.byte	(.L74-.L76)/2
 998 0020 07       		.byte	(.L79-.L76)/2
 999 0021 30       		.byte	(.L74-.L76)/2
 1000 0022 30       		.byte	(.L74-.L76)/2
 1001 0023 30       		.byte	(.L74-.L76)/2
 1002 0024 30       		.byte	(.L74-.L76)/2
 1003 0025 30       		.byte	(.L74-.L76)/2
 1004 0026 09       		.byte	(.L78-.L76)/2
 1005 0027 00       		.p2align 1
 1006              	.L79:
 404:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	break;
 1007              		.loc 1 404 0
 1008 0028 2368     		ldr	r3, [r4]
 405:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 1009              		.loc 1 405 0
 1010 002a ECE7     		b	.L73
 1011              	.L78:
 414:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 					u1_overflow_rx++;
 1012              		.loc 1 414 0
 1013 002c 1A4E     		ldr	r6, .L91+8
 1014              	.L86:
 1015 002e 3168     		ldr	r1, [r6]
 1016 0030 1A48     		ldr	r0, .L91+12
 1017 0032 C9B2     		uxtb	r1, r1
 1018 0034 FFF7FEFF 		bl	buffer_AddToEnd
 1019              	.LVL74:
 1020 0038 0A30     		adds	r0, r0, #10
 1021 003a 04D1     		bne	.L81
 415:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       		} while(U1LSR & U1LSR_RDR);										// Faça enquanto existe dados validos na FIFO de recep
 1022              		.loc 1 415 0
 1023 003c 184A     		ldr	r2, .L91+16
 1024 003e 1388     		ldrh	r3, [r2]
 1025 0040 0133     		adds	r3, r3, #1
 1026 0042 9BB2     		uxth	r3, r3
 1027 0044 1380     		strh	r3, [r2]	@ movhi
 1028              	.L81:
 1029              		.loc 1 416 0
 1030 0046 2368     		ldr	r3, [r4]
 1031 0048 D807     		lsls	r0, r3, #31
 1032 004a F0D4     		bmi	.L86
 1033 004c DBE7     		b	.L73
 1034              	.L77:
 417:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 418:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			#if (UART1_USE_HANDSHAKING == pdON) // AINDA NÃO TESTADO
 419:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      		if (UART1_RX_BUFFER_SIZE - u1_buf_rx.datalength > UART1_SIZE_FIFO)
 420:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      			 uart1_RTSon(); // Sinaliza que posso receber mais dados
 421:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      		else uart1_RTSoff(); // Sinaliza que não posso receber mais dados
 422:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   			#endif
 423:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 424:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			break;
 425:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 426:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      	// RETIRA OS DADOS DO BUFFER TX PARA A FIFO DE TRANSMISSÃO
 427:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****      		// Essa interrupção é gerada quando a FIFO de transmissão de 16 bytes está vazia
 428:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 			// O registrador UxTHR é o topo da FIFO de 16 bytes, ou seja, é o endereço da última posição a s
 429:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	case U1IIR_THRE_INT:              									// Interrupção da FIFO de 16 bytes quando está va
 430:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	while (U1LSR & U1LSR_THRE) {									// Faça enquanto há espaço na FIFO
 431:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         		if (buffer_IsEmpty(&u1_buf_tx) ) {						 	// Checa se o buffer de transmissão já está vaz
 432:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         			u1_tx_running = pdFALSE;   								// Sinaliza que não existe dados para trasnmissao
 433:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         			U1IER &= ~U1IER_ETBEI;                					// Desativa a interrupção de transmissão
 434:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****          			break;
 435:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         		} else {
 436:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 					#if (UART1_USE_HANDSHAKING == pdON) // AINDA NÃO TESTADO
 437:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	    			if (uart1_CTS()) // Checa se o receptor esteja pronto para eviar dados
 438:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 					#endif     			
 439:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         				U1THR = buffer_GetFromFront(&u1_buf_tx);			// Atribui o dado do buffer ao registrador d
 1035              		.loc 1 439 0
 1036 004e 124E     		ldr	r6, .L91+8
 1037              	.L88:
 430:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         		if (buffer_IsEmpty(&u1_buf_tx) ) {						 	// Checa se o buffer de transmissão já está vaz
 1038              		.loc 1 430 0
 1039 0050 2368     		ldr	r3, [r4]
 1040 0052 9906     		lsls	r1, r3, #26
 1041 0054 D7D5     		bpl	.L73
 431:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         			u1_tx_running = pdFALSE;   								// Sinaliza que não existe dados para trasnmissao
 1042              		.loc 1 431 0
 1043 0056 1348     		ldr	r0, .L91+20
 1044 0058 FFF7FEFF 		bl	buffer_IsEmpty
 1045              	.LVL75:
 1046 005c 40B1     		cbz	r0, .L82
 432:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         			U1IER &= ~U1IER_ETBEI;                					// Desativa a interrupção de transmissão
 1047              		.loc 1 432 0
 1048 005e 124B     		ldr	r3, .L91+24
 1049 0060 0022     		movs	r2, #0
 1050 0062 1A70     		strb	r2, [r3]
 433:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****          			break;
 1051              		.loc 1 433 0
 1052 0064 114A     		ldr	r2, .L91+28
 1053 0066 1368     		ldr	r3, [r2]
 1054 0068 23F00203 		bic	r3, r3, #2
 1055 006c 1360     		str	r3, [r2]
 434:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         		} else {
 1056              		.loc 1 434 0
 1057 006e CAE7     		b	.L73
 1058              	.L82:
 1059              		.loc 1 439 0
 1060 0070 0C48     		ldr	r0, .L91+20
 1061 0072 FFF7FEFF 		bl	buffer_GetFromFront
 1062              	.LVL76:
 1063 0076 3060     		str	r0, [r6]
 1064 0078 EAE7     		b	.L88
 1065              	.L74:
 440:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         		}
 441:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	}
 442:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****  
 443:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	break;
 444:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 445:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	case U1IIR_MS_INT:                 									// MODEM Status
 446:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	U1MSR;                          								// Limpa o registrador de status do modem
 447:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	break;
 448:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 449:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	default:															// Interrupção desconhecida
 450:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	U1LSR;															// Limpa registrador de status de linha
 1066              		.loc 1 450 0
 1067 007a 2368     		ldr	r3, [r4]
 451:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	U1RBR;															// Limpa o registrador de recepçao de dados
 1068              		.loc 1 451 0
 1069 007c 064B     		ldr	r3, .L91+8
 1070 007e 1B68     		ldr	r3, [r3]
 1071              	.L89:
 452:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	U1MSR;															// Limpa o registrador de status do modem
 1072              		.loc 1 452 0
 1073 0080 0B4B     		ldr	r3, .L91+32
 1074 0082 1B68     		ldr	r3, [r3]
 453:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****         	break;
 1075              		.loc 1 453 0
 1076 0084 BFE7     		b	.L73
 1077              	.LVL77:
 1078              	.L90:
 454:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****       	}
 455:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	}
 456:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	
 457:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	// Limpa interrupção
 458:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	#if defined(arm7tdmi)
 459:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	VICSoftIntClr = (1<<VIC_UART1);
 460:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 461:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#if defined (cortexm3)
 462:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	nvic_clearPendingIRQ(VIC_UART1);
 1079              		.loc 1 462 0
 1080 0086 0620     		movs	r0, #6
 463:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 464:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 
 465:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c ****   	ISR_EXIT;																// Procedimento para saida da interrupção
 466:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** }
 1081              		.loc 1 466 0
 1082 0088 BDE87040 		pop	{r4, r5, r6, lr}
 1083              	.LCFI9:
 1084              		.cfi_restore 14
 1085              		.cfi_restore 6
 1086              		.cfi_restore 5
 1087              		.cfi_restore 4
 1088              		.cfi_def_cfa_offset 0
 462:uc_libc_dev/_arch/arm_lpc/uart/uart1_irq.c **** 	#endif
 1089              		.loc 1 462 0
 1090 008c FFF7FEBF 		b	nvic_clearPendingIRQ
 1091              	.LVL78:
 1092              	.L92:
 1093              		.align	2
 1094              	.L91:
 1095 0090 08000140 		.word	1073807368
 1096 0094 14000140 		.word	1073807380
 1097 0098 00000140 		.word	1073807360
 1098 009c 00000000 		.word	.LANCHOR1
 1099 00a0 00000000 		.word	.LANCHOR4
 1100 00a4 00000000 		.word	.LANCHOR3
 1101 00a8 00000000 		.word	.LANCHOR5
 1102 00ac 04000140 		.word	1073807364
 1103 00b0 18000140 		.word	1073807384
 1104              		.cfi_endproc
 1105              	.LFE17:
 1107              		.section	.bss.u1_tx_running,"aw",%nobits
 1108              		.set	.LANCHOR5,. + 0
 1111              	u1_tx_running:
 1112 0000 00       		.space	1
 1113              		.section	.bss.u1_overflow_rx,"aw",%nobits
 1114              		.align	1
 1115              		.set	.LANCHOR4,. + 0
 1118              	u1_overflow_rx:
 1119 0000 0000     		.space	2
 1120              		.section	.bss.u1_data_rx,"aw",%nobits
 1121              		.set	.LANCHOR0,. + 0
 1124              	u1_data_rx:
 1125 0000 00000000 		.space	150
 1125      00000000 
 1125      00000000 
 1125      00000000 
 1125      00000000 
 1126              		.section	.bss.u1_buf_rx,"aw",%nobits
 1127              		.align	2
 1128              		.set	.LANCHOR1,. + 0
 1131              	u1_buf_rx:
 1132 0000 00000000 		.space	12
 1132      00000000 
 1132      00000000 
 1133              		.section	.bss.u1_data_tx,"aw",%nobits
 1134              		.set	.LANCHOR2,. + 0
 1137              	u1_data_tx:
 1138 0000 00000000 		.space	150
 1138      00000000 
 1138      00000000 
 1138      00000000 
 1138      00000000 
 1139              		.section	.bss.u1_buf_tx,"aw",%nobits
 1140              		.align	2
 1141              		.set	.LANCHOR3,. + 0
 1144              	u1_buf_tx:
 1145 0000 00000000 		.space	12
 1145      00000000 
 1145      00000000 
 1146              		.text
 1147              	.Letext0:
 1148              		.file 2 "uc_libc_dev/_libdef/uc_libdefs.h"
 1149              		.file 3 "uc_libc_dev/misc/buffer.h"
 1150              		.file 4 "uc_libc_dev/_arch/arm_lpc/common/vic_cortexm3.h"
DEFINED SYMBOLS
                            *ABS*:00000000 uart1_irq.c
D:\_temp\_windows\ccKrbiZH.s:29     .text.uart1_SetBaudrate:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:34     .text.uart1_SetBaudrate:00000000 uart1_SetBaudrate
D:\_temp\_windows\ccKrbiZH.s:199    .text.uart1_SetBaudrate:000000c8 $d
D:\_temp\_windows\ccKrbiZH.s:212    .text.uart1_Init:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:217    .text.uart1_Init:00000000 uart1_Init
D:\_temp\_windows\ccKrbiZH.s:335    .text.uart1_Init:00000090 $d
D:\_temp\_windows\ccKrbiZH.s:351    .text.uart1_GetChar:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:356    .text.uart1_GetChar:00000000 uart1_GetChar
D:\_temp\_windows\ccKrbiZH.s:422    .text.uart1_GetChar:0000003c $d
D:\_temp\_windows\ccKrbiZH.s:428    .text.uart1_ClearBufferRx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:433    .text.uart1_ClearBufferRx:00000000 uart1_ClearBufferRx
D:\_temp\_windows\ccKrbiZH.s:476    .text.uart1_ClearBufferRx:0000002c $d
D:\_temp\_windows\ccKrbiZH.s:484    .text.uart1_CountRxOverflow:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:489    .text.uart1_CountRxOverflow:00000000 uart1_CountRxOverflow
D:\_temp\_windows\ccKrbiZH.s:512    .text.uart1_CountRxOverflow:0000000c $d
D:\_temp\_windows\ccKrbiZH.s:517    .text.uart1_BufferRxIsEmpty:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:522    .text.uart1_BufferRxIsEmpty:00000000 uart1_BufferRxIsEmpty
D:\_temp\_windows\ccKrbiZH.s:540    .text.uart1_BufferRxIsEmpty:00000010 $d
D:\_temp\_windows\ccKrbiZH.s:545    .text.uart1_BufferQtdRx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:550    .text.uart1_BufferQtdRx:00000000 uart1_BufferQtdRx
D:\_temp\_windows\ccKrbiZH.s:566    .text.uart1_BufferQtdRx:00000008 $d
D:\_temp\_windows\ccKrbiZH.s:571    .text.uart1_GetBufferRx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:576    .text.uart1_GetBufferRx:00000000 uart1_GetBufferRx
D:\_temp\_windows\ccKrbiZH.s:589    .text.uart1_GetBufferRx:00000004 $d
D:\_temp\_windows\ccKrbiZH.s:594    .text.uart1_PutChar:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:599    .text.uart1_PutChar:00000000 uart1_PutChar
D:\_temp\_windows\ccKrbiZH.s:693    .text.uart1_PutChar:00000058 $d
D:\_temp\_windows\ccKrbiZH.s:701    .text.uart1_BasicPutChar:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:706    .text.uart1_BasicPutChar:00000000 uart1_BasicPutChar
D:\_temp\_windows\ccKrbiZH.s:731    .text.uart1_BasicPutChar:00000014 $d
D:\_temp\_windows\ccKrbiZH.s:737    .text.uart1_SpaceTx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:742    .text.uart1_SpaceTx:00000000 uart1_SpaceTx
D:\_temp\_windows\ccKrbiZH.s:780    .text.uart1_SpaceTx:00000020 $d
D:\_temp\_windows\ccKrbiZH.s:786    .text.uart1_FlushTx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:791    .text.uart1_FlushTx:00000000 uart1_FlushTx
D:\_temp\_windows\ccKrbiZH.s:821    .text.uart1_FlushTx:00000018 $d
D:\_temp\_windows\ccKrbiZH.s:828    .text.uart1_EmptyTx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:833    .text.uart1_EmptyTx:00000000 uart1_EmptyTx
D:\_temp\_windows\ccKrbiZH.s:852    .text.uart1_EmptyTx:00000014 $d
D:\_temp\_windows\ccKrbiZH.s:857    .text.uart1_WriteTx:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:862    .text.uart1_WriteTx:00000000 uart1_WriteTx
D:\_temp\_windows\ccKrbiZH.s:915    .text.uart1_PutString:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:920    .text.uart1_PutString:00000000 uart1_PutString
D:\_temp\_windows\ccKrbiZH.s:956    .text.uart1_ISR:00000000 $t
D:\_temp\_windows\ccKrbiZH.s:961    .text.uart1_ISR:00000000 uart1_ISR
D:\_temp\_windows\ccKrbiZH.s:992    .text.uart1_ISR:0000001a $d
D:\_temp\_windows\ccKrbiZH.s:1095   .text.uart1_ISR:00000090 $d
D:\_temp\_windows\ccKrbiZH.s:1111   .bss.u1_tx_running:00000000 u1_tx_running
D:\_temp\_windows\ccKrbiZH.s:1112   .bss.u1_tx_running:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1114   .bss.u1_overflow_rx:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1118   .bss.u1_overflow_rx:00000000 u1_overflow_rx
D:\_temp\_windows\ccKrbiZH.s:1124   .bss.u1_data_rx:00000000 u1_data_rx
D:\_temp\_windows\ccKrbiZH.s:1125   .bss.u1_data_rx:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1127   .bss.u1_buf_rx:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1131   .bss.u1_buf_rx:00000000 u1_buf_rx
D:\_temp\_windows\ccKrbiZH.s:1137   .bss.u1_data_tx:00000000 u1_data_tx
D:\_temp\_windows\ccKrbiZH.s:1138   .bss.u1_data_tx:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1140   .bss.u1_buf_tx:00000000 $d
D:\_temp\_windows\ccKrbiZH.s:1144   .bss.u1_buf_tx:00000000 u1_buf_tx
                     .debug_frame:00000010 $d
D:\_temp\_windows\ccKrbiZH.s:1005   .text.uart1_ISR:00000027 $d
D:\_temp\_windows\ccKrbiZH.s:1005   .text.uart1_ISR:00000028 $t

UNDEFINED SYMBOLS
__aeabi_i2d
__aeabi_dmul
__aeabi_d2iz
__aeabi_i2f
__aeabi_fdiv
__aeabi_fadd
__aeabi_fmul
__aeabi_f2d
__aeabi_ddiv
nvic_enableIRQ
nvic_setPriority
buffer_Init
buffer_GetFromFront
buffer_Clear
buffer_AddToEnd
buffer_IsEmpty
nvic_clearPendingIRQ
